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Enhancing Multi-Domain System Simulation with FMI Co-Simulation
Dukosi, a company specializing in battery cell monitoring systems, has developed a two-chip solution (Cell Monitor IC and System Hub IC) for high-power batteries, particularly in electric vehicles. Their contactless near-field communication system (C-SynQ®) provides per-cell voltage and temperature measurements with deterministic latency, unlike traditional wired modular designs that measure only a few points per module. This improves safety, performance, and sustainability by enabling faster, granular issue identification and eliminating fault-prone connectors. Senior Principal Verification Engineer Anders Convery leads digital verification for these chips, which have complex digital content (multiple processor cores, power management, fault logic) alongside analog components. Meeting high reliability standards like Automotive SPICE (ASPICE) and ASIL D (ISO 26262) is critical. To ensure thorough verification, Dukosi uses AMIQ EDA's tools: DVT IDE for writing SystemVerilog and UVM code, Verissimo SystemVerilog Linter for detecting coding errors, and Specador Documentation Generator (partially adopted). Verissimo is run by all engineers during coding and integrated into CI/CD, though check-ins are not strictly gated. It catches issues like duplicated code, dead code, outdated coverage groups, unchecked function returns, and failed type casting—bugs that previously caused lengthy simulation debug cycles. Manual code reviews now focus on design logic rather than typos, as Verissimo enforces custom coding guidelines aligned with ASPICE and ISO 26262. The team finds AMIQ EDA's tools high-quality and their support effective, improving verification efficiency and confidence in meeting safety standards.
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2026-07-21
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