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CEO Interview with Mark Goranson of EMASS

29 d ago

By Raghu Shankar | LinkedIn, June 2026 Systems-in-package (SIPs) with 2.5D and 3D heterogeneous integration, using multiple dies and chiplets, deliver 10x more functionality than monolithic chips. Chiplets offer modular building blocks with higher yields and lower costs, enabling reuse across products and generations. However, broad adoption in lower-volume, lower-budget markets faces a bottleneck during the planning and design phase. Key challenges include clearly defining market need (value proposition, adoption potential, price sensitivity, demand) and ensuring each supply-chain vendor sees profitable, manageable risk. Systematically evaluating design options on technical and business merits is essential. The proposed solution involves three shifts: **shift-left**—move multi-vendor evaluations to the front-end of the design cycle; **shift-up**—focus on the architecture layer for faster interoperability testing, abstracting physical, adapter/link, and protocol layers; **shift-out**—expand the pool of buyers, sellers, and IP beyond industry silos. An AI-native virtual chiplet ecosystem is needed for planning and prototyping, with security, governance, and safeguards. This ecosystem should include specs, behavioral models, stimuli, reference designs, verification methodologies, and results. AI would automate searches, rank matching, highlight gaps, generate code, and connect to EDA tools, while humans set objectives. Leaders from the Open Chiplet Economy (OCE) under the Open Compute Project (OCP) are driving this vision, encouraging participation from commercial, research, and academic entities. OCP/OCE amplifies efforts through summits, newsletters, and webinars. The goal is to enable multi-vendor heterogeneous solutions for scientific computing, automotive, defense, and more, by reducing friction and lowering barriers for early-stage exploration.