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ASRock Rack SORANOD8-2L2T Review A New AMD EPYC 8005 Sorano Motherboard
AMD EPYC 9006 "Venice" processors, built on Zen 6 architecture, are AMD's next-generation server CPUs targeting data center and AI workloads with up to 256 cores, new I/O die supporting MRDIMMs up to 12,800 MT/s and PCIe Gen6, as detailed at the Advancing AI 2026 event. The EPYC 9006 family overhauls AMD's enterprise hardware stack, aiming to sustain momentum in the server market and address growing AI infrastructure demands. Key technical upgrades include two CCD chiplet types—high-performance Zen 6 (up to 96 cores, 5.0GHz) and high-density Zen 6c (up to 256 cores, 4.1GHz)—both fabricated on TSMC 2nm. The dense Venice chips offer 2.66x more cores than the performance variants, while clock-speed gaps shrink. L3 cache per core doubles to 4MB, yielding up to 384MB on standard chips and 1024MB on dense configurations. The new I/O die supports 16 memory channels, DDR5 RDIMMs at 8000 MT/s, and MRDIMMs at 12,800 MT/s, delivering up to 1.6TB/s memory bandwidth. PCIe Gen6 and CXL 3.1 provide 128 lanes per socket, doubling I/O bandwidth over the previous Turin generation. A critical addition is cache-coherent xGMI interconnect between Venice CPUs and AMD's MI455X GPUs, enabling unified memory domains for improved AI system performance. AMD also introduced the Helios rackscale system to deploy these CPUs across traditional servers and AI clusters. The EPYC 9006 lineup includes four major chips, with the first models launching soon, positioning AMD to further expand its server CPU market share as server revenue now exceeds consumer revenue.