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Building a Faster Path from Semiconductor Idea to Commercial Silicon
Intel Foundry has unveiled Intel 18A-P, a performance-enhanced derivative of its 18A process node, delivering over 9% higher performance at constant power or more than 18% lower power at constant performance based on Arm processor-core sub-block measurements, targeting semiconductor and AI chip designers seeking advanced foundry technology without full-node disruption. The node retains Intel 18A’s RibbonFET gate-all-around transistors and PowerVia backside power delivery, while adding a Power Boost dual-contact structure that reduces external resistance by approximately 20% for NMOS and 12% for PMOS devices, enabling W3P transistors to operate over 10% faster at matched capacitance. Strain engineering boosts NMOS drive current by ~5% and PMOS drive current by ~16%, contributing to an estimated 12% increase in circuit-level switching speed. Interconnect refinements cut via resistance by 10% to 30% in performance-critical layers, and bond-stack thermal conductance improves by 50%, reducing overall stack thermal resistance by 20% to 40%—beneficial for sustained AI accelerator and data-center processor workloads. Intel 18A-P also adds an intermediate threshold-voltage pair and approximately 33% tighter skew corners, giving synthesis tools finer control over leakage versus delay trade-offs. Crucially, it retains Intel 18A design rules, SRAM offerings, IP, and design infrastructure, allowing customers to migrate existing blocks without a full-node transition. Reliability metrics maintain Intel 18A targets for gate-oxide and hot-carrier degradation while improving PMOS negative-bias temperature-instability behavior. The process illustrates how coordinated optimization across transistors, contacts, interconnects, power delivery, and thermal structures now drives semiconductor advancement, with success depending on production yield and customer silicon.